In the process of producing or using a semiconductor integrated circuit device, electrostatic discharge (ESD) may result in sudden flow of electricity. The sudden flow of electricity may cause damage to the semiconductor integrated circuit device or the functional circuit, and reduce the production efficiency and the product yield.
For reducing the influence of the high ESD current on the semiconductor integrated circuit device, an electrostatic discharge protection structure is integrated into the semiconductor integrated circuit device. Generally, once the electrostatic discharge protection structure is triggered, the holding voltage of the electrostatic discharge protection structure in a snapback breakdown condition may be pulled down to a low voltage. If the holding voltage is lower than a high power supply voltage of the integrated circuit device, the high-voltage integrated circuit device is susceptible to the latchup-like danger in the real life application system.
Therefore, there is a need of providing an electrostatic discharge protection structure to eliminate the above drawbacks.